This invention relates to a semiconductor memory. More particularly, it relates to a semiconductor memory which is constructed of MISFETs (Metal-Insulator-Semiconductor Field Effect Transistors) represented by MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors) (hereinbelow, abbreviated to "MOS").
Hereunder, a P-channel MOSFET and an N-channel MOSFET will be respectively called "P-MOS" and "N-MOS", and a complementary MOSFET with both the MOSFETs combined will be called "CMOS". A pair of data lines connected to a sense amplifier to be in parallel with each other will be referred to as "folded data lines".
The so-called one-element memory cell which is constructed of one MOSFET and one capacitor requires only a small number of elements and wirings, and therefore has the merit that the area occupied by the memory cell is quite small compared to other memory cell arrangements. For this reason, semiconductor memories employing one-element type memory cells are being put into extensive use for dynamic RAMs having a large memory capacity.
Since the performance of a sense amplifier in the dynamic RAM is greatly influential on the operation margin of the memory, the design of the sense amplifier is extremely important in the circuit design of a one-element type memory cell system. In addition, the sense amplifier must be efficiently formed in one semiconductor substrate together with the memory cells using semiconductor integrated circuit technology in such a manner that it will not occupy a large area.
On the other hand, in the dynamic RAM, the structure of the memory cell must be arranged to prevent soft errors which can result from .alpha.-particles (alpha-particles). Further, when integrated to be unitary with the sense amplifier, the memory cell is required to have high speed information read-out capabilities.